Input data appearing on the data bus, is written to the memory array subject to the DM input logic level appearing coincident with the data. 数据总线上的输入数据是否写入存储器,取决于此时的DM的输入逻辑。
A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software. 磁处理器由逻辑闸阵列所组成,其中每个闸都可以由软体独立编程。
The emergence of General Array Logic ( GAL), a fairly new type of logic devices with the characteristics of user definable logic functions, have led to a revolutionary change in the design of logical circuits. 通用阵列逻辑GAL器件是可以由用户定义其逻辑功能的新型逻辑器件,它的出现使数字电路设计发生了深刻变革。
A Study on Programming Laws of Generic Array Logic 可编程阵列逻辑(GAL)器件编程规律的研究
The Generalized Equivalent Circuits for Output Logic Macro Cells of Generic Array Logic Devices GAL器件输出逻辑宏单元的通用等效电路
The Design of LS SIMD Array Microprocessor Control Logic LSSIMD阵列微处理器的控制逻辑设计
In this paper, we discuss a FIFO memory electrocircuit, which is designed from the top down and have been fabricated successfully. Simultaneously we sum up the realization of two pivotal technology: RAM array and control logic. 文章介绍了一个正向设计,并已成功流片的FIFO存储器电路结构设计及关键技术,重点研究了实现该电路的两类关键技术,存储电路和控制逻辑。
The research of generic array logic device programming method 通用阵列逻辑GAL器件编程方法的研究
A method for Decrypting the Encrypted Logic of General Array Logic 限免GAL加密逻辑的一种方法
The system used hight-performance DSP ( TMS320C6202) to realize the real-time image object tracking algorithm, used large-scaled programmable logical array CPLD to control logic and field programmable gate array FPGA to preprocessing the image. 其中运用了高性能DSP(TMS320C6202)完成实时图像目标处理算法,并结合大规模可编程逻辑阵列CPLD进行逻辑控制和现场可编程门阵列FPGA对采集的视频图像做预处理,满足了系统的实时性。
The pre-functional cell of standard buffered FET logic ( BFL) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability. 此门阵列采用的BFL预功能级标准逻辑单元,具有九种组合逻辑功能及两种不同选择的驱动能力,并具有输出电平调节功能。
In hardware circuit, the speed of data processing are improved with DSP, Field programmable gate array ( FPGA) control logic of periphery circuit. In software system, we analyze the principle of subpixel subdivision and establish the mathematic model. 在硬件电路中,采用DSP嵌入式开发系统,提高数据的处理速度,使用可编程逻辑器件FPGA实现对外围接口电路的逻辑控制。
This paper is to introduce designing principle and managing software of printed Chinese character recognition unit that consists of 16-bit CPU, dynamic RAM array, training and sorting logic etc. 介绍由16位CPU、动态RAM阵列、训练分类等逻辑组成的印刷体汉字识别部件的设计原理和管理软件。
Optical parallel array logic based on spatial amplitude encoding pattern method for optical digital computing 基于光学数字计算空间振幅编码图形法的光学并行阵列逻辑
CMOS image sensor consists of image array logic registers, memory, timer pulse generator and converter. CMOS图像传感器包括图像阵列逻辑寄存器、存储器、定时脉冲发生器和转换器在内的全部系统。
The method of design of ten's carry reversible counter by use of common array logic element GAL is introduced. 介绍用通用阵列逻辑器件GAL设计十进制可逆计数器的方法。
This paper review elementary theory for new logic circuit with ROM memory array, and provide design method for two practical array logic circuit. 本文论述用ROM的存贮阵列构成新颖的组合逻辑电路和时序逻辑电路的基本原理,并给出两个实际的阵列式逻辑电路的设计方法。
This paper presents the principle and the features of a new spatial amplitude encoding pattern method implementing optical parallel array logic gates. 本文给出了执行光学并行阵列逻辑的一种新的空间振幅编码图形法的原理和特性。
The thought of the software wireless has already expanded into wireless correspondence realm. That technique depends on hardware technique of wide band and even antenna, high speed AD/ DA chip, an array of programmable largescale logic, the high speed DSP numerical signal processing chip. 软件无线电的思想已推广到无线电通信领域,该技术依托于宽频段、特性均匀的天线,高速的AD/DA芯片,可编程大规模逻辑门阵列,通用高速的DSP数字信号处理芯片等硬件技术。
A high-speed AND-OR universal array of multiple valued logic is proposed, and 10100 different decimal logic functions of two variables can be realized by use of 100 MV-DYL AND gates regularly arranged. 本文还根据MV-DYL电路的特点,提出一种高速的多值逻辑与或通用阵列,阐明用100个规律排列的MV-DYL与门可以实现二元十值逻辑运算功能。
In the brushless model, the IGBT ( Isolated Gate Bipolar Transistor) switch state period table is gained by GAL ( Generic Array Logic) which analyzes the signal of position feed-back. 在无刷直流方式下,用GAL对位置反馈信号进行逻辑综合,得到开关管的导通规律。
Research of Combination Models in Generic Array Logic 通用阵列逻辑的组合输出模式研究
The transmission circuit controlled by generic array logic ( GAL) has a lot of characteristics, such as the good integrated capability, high reliability and so on. 采用通用阵列逻辑(GAL)控制的发射电路具有集成度高、可靠性强等特点。
Generic Array Logic is a new programmable logic device on design of digital system. 通用陈列逻辑是用于数字系统设计的最新可编程器件。
Three-phase& six beats circulating distributor made of Generic array logic ( GAL16V8) works at TTL level, so it can be used with other TTL circuit. 用门阵列GAL16V8做的三相六拍环形分配器工作在TTL电平,从而可以与其它TTL电路一起使用。
CMOS image sensor consists of image array logic registers, row drivers, timing generation and logic control, A/ D converter and so on. CMOS图像传感器将图像像敏逻辑阵列、行驱动器、时序控制逻辑、A/D转换器等几部分集成在同一块硅片上。